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LPC11Uxx.h
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1 
2 /****************************************************************************************************/
19 
21 
30 #ifndef __LPC11UXX_H__
31 #define __LPC11UXX_H__
32 
33 #ifdef __cplusplus
34 extern "C" {
35 #endif
36 
37 
38 #if defined ( __CC_ARM )
39  #pragma anon_unions
40 #endif
41 
42  /* Interrupt Number Definition */
43 
44 typedef enum {
45 // ------------------------- Cortex-M0 Processor Exceptions Numbers -----------------------------
46  Reset_IRQn = -15,
49  SVCall_IRQn = -5,
51  PendSV_IRQn = -2,
52  SysTick_IRQn = -1,
53 // --------------------------- LPC11Uxx Specific Interrupt Numbers ------------------------------
55  FLEX_INT1_IRQn = 1,
56  FLEX_INT2_IRQn = 2,
57  FLEX_INT3_IRQn = 3,
58  FLEX_INT4_IRQn = 4,
59  FLEX_INT5_IRQn = 5,
60  FLEX_INT6_IRQn = 6,
61  FLEX_INT7_IRQn = 7,
62  GINT0_IRQn = 8,
63  GINT1_IRQn = 9,
65  Reserved1_IRQn = 11,
66  Reserved2_IRQn = 12,
67  Reserved3_IRQn = 13,
68  SSP1_IRQn = 14,
69  I2C_IRQn = 15,
74  SSP0_IRQn = 20,
75  UART_IRQn = 21,
76  USB_IRQn = 22,
77  USB_FIQn = 23,
78  ADC_IRQn = 24,
79  WDT_IRQn = 25,
80  BOD_IRQn = 26,
81  FMC_IRQn = 27,
86 } IRQn_Type;
87 
88 
93 /* Processor and Core Peripheral Section */ /* Configuration of the Cortex-M0 Processor and Core Peripherals */
94 
95 #define __MPU_PRESENT 0
96 #define __NVIC_PRIO_BITS 2
97 #define __Vendor_SysTickConfig 0 /* End of group Configuration_of_CMSIS */
99 
100 #include "core_cm0.h"
101 #include "system_LPC11Uxx.h"
108 // ------------------------------------------------------------------------------------------------
109 // ----- I2C -----
110 // ------------------------------------------------------------------------------------------------
111 
112 
117 typedef struct {
118  __IO uint32_t CONSET;
119  __I uint32_t STAT;
120  __IO uint32_t DAT;
121  __IO uint32_t ADR0;
122  __IO uint32_t SCLH;
123  __IO uint32_t SCLL;
124  __IO uint32_t CONCLR;
125  __IO uint32_t MMCTRL;
126  __IO uint32_t ADR1;
127  __IO uint32_t ADR2;
128  __IO uint32_t ADR3;
129  __I uint32_t DATA_BUFFER;
130 union{
131  __IO uint32_t MASK[4];
132  struct{
133  __IO uint32_t MASK0;
134  __IO uint32_t MASK1;
135  __IO uint32_t MASK2;
136  __IO uint32_t MASK3;
137  };
138  };
139 } LPC_I2C_Type;
140 
141 
142 // ------------------------------------------------------------------------------------------------
143 // ----- WWDT -----
144 // ------------------------------------------------------------------------------------------------
145 
146 
151 typedef struct {
152  __IO uint32_t MOD;
153  __IO uint32_t TC;
154  __IO uint32_t FEED;
155  __I uint32_t TV;
156  __IO uint32_t CLKSEL;
157  __IO uint32_t WARNINT;
158  __IO uint32_t WINDOW;
159 } LPC_WWDT_Type;
160 
161 
162 // ------------------------------------------------------------------------------------------------
163 // ----- USART -----
164 // ------------------------------------------------------------------------------------------------
165 
166 
171 typedef struct {
173  union {
174  __IO uint32_t DLL;
175  __O uint32_t THR;
176  __I uint32_t RBR;
177  };
178 
179  union {
180  __IO uint32_t IER;
181  __IO uint32_t DLM;
182  };
183 
184  union {
185  __O uint32_t FCR;
186  __I uint32_t IIR;
187  };
188  __IO uint32_t LCR;
189  __IO uint32_t MCR;
190  __I uint32_t LSR;
191  __I uint32_t MSR;
192  __IO uint32_t SCR;
193  __IO uint32_t ACR;
194  __IO uint32_t ICR;
195  __IO uint32_t FDR;
196  __IO uint32_t OSR;
197  __IO uint32_t TER;
198  __I uint32_t RESERVED0[3];
199  __IO uint32_t HDEN;
200  __I uint32_t RESERVED1;
201  __IO uint32_t SCICTRL;
202  __IO uint32_t RS485CTRL;
203  __IO uint32_t RS485ADRMATCH;
204  __IO uint32_t RS485DLY;
205  __IO uint32_t SYNCCTRL;
207 
208 
209 // ------------------------------------------------------------------------------------------------
210 // ----- Timer -----
211 // ------------------------------------------------------------------------------------------------
212 
213 
218 /* *************************Timer 0 Base Type ***************************************** */
219 typedef struct {
220  __IO uint32_t IR;
221  __IO uint32_t TCR;
222  __IO uint32_t TC;
223  __IO uint32_t PR;
224  __IO uint32_t PC;
225  __IO uint32_t MCR;
226  union {
227  __IO uint32_t MR[4];
228  struct{
229  __IO uint32_t MR0;
230  __IO uint32_t MR1;
231  __IO uint32_t MR2;
232  __IO uint32_t MR3;
233  };
234  };
235  __IO uint32_t CCR;
236  union{
237  __I uint32_t CR[4];
238  struct{
239  __I uint32_t CR0;
240  __I uint32_t RESERVED1;
241  __I uint32_t CR1;
242  __I uint32_t RESERVED2;
243  };
244  };
245 __IO uint32_t EMR;
246  __I uint32_t RESERVED0[12];
247  __IO uint32_t CTCR;
248  __IO uint32_t PWMC;
250 
251 
252 /* *************************Timer 1 Base Type ***************************************** */
253 typedef struct {
254  __IO uint32_t IR;
255  __IO uint32_t TCR;
256  __IO uint32_t TC;
257  __IO uint32_t PR;
258  __IO uint32_t PC;
259  __IO uint32_t MCR;
260  union {
261  __IO uint32_t MR[4];
262  struct{
263  __IO uint32_t MR0;
264  __IO uint32_t MR1;
265  __IO uint32_t MR2;
266  __IO uint32_t MR3;
267  };
268  };
269  __IO uint32_t CCR;
270  union{
271  __I uint32_t CR[4];
272  struct{
273  __I uint32_t CR0;
274  __I uint32_t CR1;
275  __I uint32_t RESERVED1;
276  __I uint32_t RESERVED2;
277  };
278  };
279 __IO uint32_t EMR;
280  __I uint32_t RESERVED0[12];
281  __IO uint32_t CTCR;
282  __IO uint32_t PWMC;
284 
285 
286 // ------------------------------------------------------------------------------------------------
287 // ----- ADC -----
288 // ------------------------------------------------------------------------------------------------
289 
290 
295 typedef struct {
296  __IO uint32_t CR;
297  __IO uint32_t GDR;
298  __I uint32_t RESERVED0[1];
299  __IO uint32_t INTEN;
300  union{
301  __I uint32_t DR[8];
302  struct{
303  __IO uint32_t DR0;
304  __IO uint32_t DR1;
305  __IO uint32_t DR2;
306  __IO uint32_t DR3;
307  __IO uint32_t DR4;
308  __IO uint32_t DR5;
309  __IO uint32_t DR6;
310  __IO uint32_t DR7;
311  };
312  };
313  __I uint32_t STAT;
314 } LPC_ADC_Type;
315 
316 
317 // ------------------------------------------------------------------------------------------------
318 // ----- PMU -----
319 // ------------------------------------------------------------------------------------------------
320 
321 
326 typedef struct {
327  __IO uint32_t PCON;
328  union{
329  __IO uint32_t GPREG[4];
330  struct{
331  __IO uint32_t GPREG0;
332  __IO uint32_t GPREG1;
333  __IO uint32_t GPREG2;
334  __IO uint32_t GPREG3;
335  };
336  };
337 } LPC_PMU_Type;
338 
339 
340 // ------------------------------------------------------------------------------------------------
341 // ----- FLASHCTRL -----
342 // ------------------------------------------------------------------------------------------------
343 
344 
349 typedef struct {
350  __I uint32_t RESERVED0[4];
351  __IO uint32_t FLASHCFG;
352  __I uint32_t RESERVED1[3];
353  __IO uint32_t FMSSTART;
354  __IO uint32_t FMSSTOP;
355  __I uint32_t RESERVED2[1];
356  __I uint32_t FMSW0;
357  __I uint32_t FMSW1;
358  __I uint32_t FMSW2;
359  __I uint32_t FMSW3;
360  __I uint32_t RESERVED3[1001];
361  __I uint32_t FMSTAT;
362  __I uint32_t RESERVED4[1];
363  __IO uint32_t FMSTATCLR;
365 
366 
367 // ------------------------------------------------------------------------------------------------
368 // ----- SSP0/1 -----
369 // ------------------------------------------------------------------------------------------------
370 
371 
376 typedef struct {
377  __IO uint32_t CR0;
378  __IO uint32_t CR1;
379  __IO uint32_t DR;
380  __I uint32_t SR;
381  __IO uint32_t CPSR;
382  __IO uint32_t IMSC;
383  __I uint32_t RIS;
384  __I uint32_t MIS;
385  __IO uint32_t ICR;
386 } LPC_SSPx_Type;
387 
388 
389 
390 // ------------------------------------------------------------------------------------------------
391 // ----- IOCONFIG -----
392 // ------------------------------------------------------------------------------------------------
393 
394 
399 typedef struct {
400  __IO uint32_t RESET_PIO0_0;
401  __IO uint32_t PIO0_1;
402  __IO uint32_t PIO0_2;
403  __IO uint32_t PIO0_3;
404  __IO uint32_t PIO0_4;
405  __IO uint32_t PIO0_5;
406  __IO uint32_t PIO0_6;
407  __IO uint32_t PIO0_7;
408  __IO uint32_t PIO0_8;
409  __IO uint32_t PIO0_9;
410  __IO uint32_t SWCLK_PIO0_10;
411  __IO uint32_t TDI_PIO0_11;
412  __IO uint32_t TMS_PIO0_12;
413  __IO uint32_t TDO_PIO0_13;
414  __IO uint32_t TRST_PIO0_14;
415  __IO uint32_t SWDIO_PIO0_15;
416  __IO uint32_t PIO0_16;
417  __IO uint32_t PIO0_17;
418  __IO uint32_t PIO0_18;
419  __IO uint32_t PIO0_19;
420  __IO uint32_t PIO0_20;
421  __IO uint32_t PIO0_21;
422  __IO uint32_t PIO0_22;
423  __IO uint32_t PIO0_23;
424  __IO uint32_t PIO1_0;
425  __IO uint32_t PIO1_1;
426  __IO uint32_t PIO1_2;
427  __IO uint32_t PIO1_3;
428  __IO uint32_t PIO1_4;
429  __IO uint32_t PIO1_5;
430  __IO uint32_t PIO1_6;
431  __IO uint32_t PIO1_7;
432  __IO uint32_t PIO1_8;
433  __IO uint32_t PIO1_9;
434  __IO uint32_t PIO1_10;
435  __IO uint32_t PIO1_11;
436  __IO uint32_t PIO1_12;
437  __IO uint32_t PIO1_13;
438  __IO uint32_t PIO1_14;
439  __IO uint32_t PIO1_15;
440  __IO uint32_t PIO1_16;
441  __IO uint32_t PIO1_17;
442  __IO uint32_t PIO1_18;
443  __IO uint32_t PIO1_19;
444  __IO uint32_t PIO1_20;
445  __IO uint32_t PIO1_21;
446  __IO uint32_t PIO1_22;
447  __IO uint32_t PIO1_23;
448  __IO uint32_t PIO1_24;
449  __IO uint32_t PIO1_25;
450  __IO uint32_t PIO1_26;
451  __IO uint32_t PIO1_27;
452  __IO uint32_t PIO1_28;
453  __IO uint32_t PIO1_29;
454  __IO uint32_t PIO1_30;
455  __IO uint32_t PIO1_31;
457 
458 
459 // ------------------------------------------------------------------------------------------------
460 // ----- SYSCON -----
461 // ------------------------------------------------------------------------------------------------
462 
463 
468 typedef struct {
469  __IO uint32_t SYSMEMREMAP;
470  __IO uint32_t PRESETCTRL;
471  __IO uint32_t SYSPLLCTRL;
472  __I uint32_t SYSPLLSTAT;
473  __IO uint32_t USBPLLCTRL;
474  __I uint32_t USBPLLSTAT;
475  __I uint32_t RESERVED0[2];
476  __IO uint32_t SYSOSCCTRL;
477  __IO uint32_t WDTOSCCTRL;
478  __I uint32_t RESERVED1[2];
479  __IO uint32_t SYSRSTSTAT;
480  __I uint32_t RESERVED2[3];
481  __IO uint32_t SYSPLLCLKSEL;
482  __IO uint32_t SYSPLLCLKUEN;
483  __IO uint32_t USBPLLCLKSEL;
484  __IO uint32_t USBPLLCLKUEN;
485  __I uint32_t RESERVED3[8];
486  __IO uint32_t MAINCLKSEL;
487  __IO uint32_t MAINCLKUEN;
488  __IO uint32_t SYSAHBCLKDIV;
489  __I uint32_t RESERVED4[1];
490  __IO uint32_t SYSAHBCLKCTRL;
491  __I uint32_t RESERVED5[4];
492  __IO uint32_t SSP0CLKDIV;
493  __IO uint32_t UARTCLKDIV;
494  __IO uint32_t SSP1CLKDIV;
495  __I uint32_t RESERVED6[8];
496  __IO uint32_t USBCLKSEL;
497  __IO uint32_t USBCLKUEN;
498  __IO uint32_t USBCLKDIV;
499  __I uint32_t RESERVED7[5];
500  __IO uint32_t CLKOUTSEL;
501  __IO uint32_t CLKOUTUEN;
502  __IO uint32_t CLKOUTDIV;
503  __I uint32_t RESERVED8[5];
504  __I uint32_t PIOPORCAP0;
505  __I uint32_t PIOPORCAP1;
506  __I uint32_t RESERVED9[18];
507  __IO uint32_t BODCTRL;
508  __IO uint32_t SYSTCKCAL;
509  __I uint32_t RESERVED10[6];
510  __IO uint32_t IRQLATENCY;
511  __IO uint32_t NMISRC;
512  __IO uint32_t PINTSEL[8];
513  __IO uint32_t USBCLKCTRL;
514  __I uint32_t USBCLKST;
515  __I uint32_t RESERVED11[25];
516  __IO uint32_t STARTERP0;
517  __I uint32_t RESERVED12[3];
518  __IO uint32_t STARTERP1;
519  __I uint32_t RESERVED13[6];
520  __IO uint32_t PDSLEEPCFG;
521  __IO uint32_t PDAWAKECFG;
522  __IO uint32_t PDRUNCFG;
523  __I uint32_t RESERVED14[110];
524  __I uint32_t DEVICE_ID;
526 
527 
528 // ------------------------------------------------------------------------------------------------
529 // ----- GPIO_PIN_INT -----
530 // ------------------------------------------------------------------------------------------------
531 
532 
537 typedef struct {
538  __IO uint32_t ISEL;
539  __IO uint32_t IENR;
540  __IO uint32_t SIENR;
541  __IO uint32_t CIENR;
542  __IO uint32_t IENF;
543  __IO uint32_t SIENF;
544  __IO uint32_t CIENF;
545  __IO uint32_t RISE;
546  __IO uint32_t FALL;
547  __IO uint32_t IST;
549 
550 
551 // ------------------------------------------------------------------------------------------------
552 // ----- GPIO_GROUP_INT0/1 -----
553 // ------------------------------------------------------------------------------------------------
554 
555 
560 typedef struct {
561  __IO uint32_t CTRL;
562  __I uint32_t RESERVED0[7];
563  __IO uint32_t PORT_POL[2];
564  __I uint32_t RESERVED1[6];
565  __IO uint32_t PORT_ENA[2];
567 
568 
569 
570 // ------------------------------------------------------------------------------------------------
571 // ----- USB -----
572 // ------------------------------------------------------------------------------------------------
573 
574 
579 typedef struct {
580  __IO uint32_t DEVCMDSTAT;
581  __IO uint32_t INFO;
582  __IO uint32_t EPLISTSTART;
583  __IO uint32_t DATABUFSTART;
584  __IO uint32_t LPM;
585  __IO uint32_t EPSKIP;
586  __IO uint32_t EPINUSE;
587  __IO uint32_t EPBUFCFG;
588  __IO uint32_t INTSTAT;
589  __IO uint32_t INTEN;
590  __IO uint32_t INTSETSTAT;
591  __IO uint32_t INTROUTING;
592  __I uint32_t RESERVED0[1];
593  __I uint32_t EPTOGGLE;
594 } LPC_USB_Type;
595 
596 
597 // ------------------------------------------------------------------------------------------------
598 // ----- GPIO_PORT -----
599 // ------------------------------------------------------------------------------------------------
600 
601 
606 typedef struct {
607  union {
608  struct {
609  __IO uint8_t B0[32];
610  __IO uint8_t B1[32];
611  };
612  __IO uint8_t B[64];
613  };
614  __I uint32_t RESERVED0[1008];
615  union {
616  struct {
617  __IO uint32_t W0[32];
618  __IO uint32_t W1[32];
619  };
620  __IO uint32_t W[64];
621  };
622  uint32_t RESERVED1[960];
623  __IO uint32_t DIR[2]; /* 0x2000 */
624  uint32_t RESERVED2[30];
625  __IO uint32_t MASK[2]; /* 0x2080 */
626  uint32_t RESERVED3[30];
627  __IO uint32_t PIN[2]; /* 0x2100 */
628  uint32_t RESERVED4[30];
629  __IO uint32_t MPIN[2]; /* 0x2180 */
630  uint32_t RESERVED5[30];
631  __IO uint32_t SET[2]; /* 0x2200 */
632  uint32_t RESERVED6[30];
633  __O uint32_t CLR[2]; /* 0x2280 */
634  uint32_t RESERVED7[30];
635  __O uint32_t NOT[2]; /* 0x2300 */
636 } LPC_GPIO_Type;
637 
638 
639 #if defined ( __CC_ARM )
640  #pragma no_anon_unions
641 #endif
642 
643 /* The value at this address is the entry to ROM Division API.
644  Once it is dereferenced, individual API functions can be used*/
645 #define LPC_1XXX_ROM_LOC (0x1FFF1FF8)
646 
647 // ------------------------------------------------------------------------------------------------
648 // ----- Peripheral memory map -----
649 // ------------------------------------------------------------------------------------------------
650 #define LPC_I2C_BASE (0x40000000)
651 #define LPC_WWDT_BASE (0x40004000)
652 #define LPC_USART_BASE (0x40008000)
653 #define LPC_CT16B0_BASE (0x4000C000)
654 #define LPC_CT16B1_BASE (0x40010000)
655 #define LPC_CT32B0_BASE (0x40014000)
656 #define LPC_CT32B1_BASE (0x40018000)
657 #define LPC_ADC_BASE (0x4001C000)
658 #define LPC_PMU_BASE (0x40038000)
659 #define LPC_FLASHCTRL_BASE (0x4003C000)
660 #define LPC_SSP0_BASE (0x40040000)
661 #define LPC_SSP1_BASE (0x40058000)
662 #define LPC_IOCON_BASE (0x40044000)
663 #define LPC_SYSCON_BASE (0x40048000)
664 #define LPC_GPIO_PIN_INT_BASE (0x4004C000)
665 #define LPC_GPIO_GROUP_INT0_BASE (0x4005C000)
666 #define LPC_GPIO_GROUP_INT1_BASE (0x40060000)
667 #define LPC_USB_BASE (0x40080000)
668 #define LPC_GPIO_BASE (0x50000000)
669 
670 
671 // ------------------------------------------------------------------------------------------------
672 // ----- Peripheral declaration -----
673 // ------------------------------------------------------------------------------------------------
674 /* Původně
675 #define LPC_I2C ((LPC_I2C_Type *) LPC_I2C_BASE)
676 #define LPC_WWDT ((LPC_WWDT_Type *) LPC_WWDT_BASE)
677 #define LPC_USART ((LPC_USART_Type *) LPC_USART_BASE)
678 #define LPC_CT16B0 ((LPC_CTxxB0_Type *) LPC_CT16B0_BASE)
679 #define LPC_CT16B1 ((LPC_CTxxB1_Type *) LPC_CT16B1_BASE)
680 #define LPC_CT32B0 ((LPC_CTxxB0_Type *) LPC_CT32B0_BASE)
681 #define LPC_CT32B1 ((LPC_CTxxB1_Type *) LPC_CT32B1_BASE)
682 #define LPC_ADC ((LPC_ADC_Type *) LPC_ADC_BASE)
683 #define LPC_PMU ((LPC_PMU_Type *) LPC_PMU_BASE)
684 #define LPC_FLASHCTRL ((LPC_FLASHCTRL_Type *) LPC_FLASHCTRL_BASE)
685 #define LPC_SSP0 ((LPC_SSPx_Type *) LPC_SSP0_BASE)
686 #define LPC_SSP1 ((LPC_SSPx_Type *) LPC_SSP1_BASE)
687 #define LPC_IOCON ((LPC_IOCON_Type *) LPC_IOCON_BASE)
688 #define LPC_SYSCON ((LPC_SYSCON_Type *) LPC_SYSCON_BASE)
689 #define LPC_GPIO_PIN_INT ((LPC_GPIO_PIN_INT_Type *) LPC_GPIO_PIN_INT_BASE)
690 #define LPC_GPIO_GROUP_INT0 ((LPC_GPIO_GROUP_INTx_Type*) LPC_GPIO_GROUP_INT0_BASE)
691 #define LPC_GPIO_GROUP_INT1 ((LPC_GPIO_GROUP_INTx_Type*) LPC_GPIO_GROUP_INT1_BASE)
692 #define LPC_USB ((LPC_USB_Type *) LPC_USB_BASE)
693 #define LPC_GPIO ((LPC_GPIO_Type *) LPC_GPIO_BASE)
694 
695 // Zde v main, mělo by být asi někde jinde - nelze však dát do hlavičky (jediná instance)
696 LPC_I2C_Type * const LPC_I2C = ((LPC_I2C_Type *) LPC_I2C_BASE);
697 LPC_WWDT_Type * const LPC_WWDT = ((LPC_WWDT_Type *) LPC_WWDT_BASE);
698 LPC_USART_Type * const LPC_USART = ((LPC_USART_Type *) LPC_USART_BASE);
699 LPC_CTxxB0_Type * const LPC_CT16B0 = ((LPC_CTxxB0_Type *) LPC_CT16B0_BASE);
700 LPC_CTxxB1_Type * const LPC_CT16B1 = ((LPC_CTxxB1_Type *) LPC_CT16B1_BASE);
701 LPC_CTxxB0_Type * const LPC_CT32B0 = ((LPC_CTxxB0_Type *) LPC_CT32B0_BASE);
702 LPC_CTxxB1_Type * const LPC_CT32B1 = ((LPC_CTxxB1_Type *) LPC_CT32B1_BASE);
703 LPC_ADC_Type * const LPC_ADC = ((LPC_ADC_Type *) LPC_ADC_BASE);
704 LPC_PMU_Type * const LPC_PMU = ((LPC_PMU_Type *) LPC_PMU_BASE);
705 LPC_FLASHCTRL_Type * const LPC_FLASHCTRL = ((LPC_FLASHCTRL_Type *) LPC_FLASHCTRL_BASE);
706 LPC_SSPx_Type * const LPC_SSP0 = ((LPC_SSPx_Type *) LPC_SSP0_BASE);
707 LPC_SSPx_Type * const LPC_SSP1 = ((LPC_SSPx_Type *) LPC_SSP1_BASE);
708 LPC_IOCON_Type * const LPC_IOCON = ((LPC_IOCON_Type *) LPC_IOCON_BASE);
709 LPC_SYSCON_Type * const LPC_SYSCON = ((LPC_SYSCON_Type *) LPC_SYSCON_BASE);
710 LPC_GPIO_PIN_INT_Type * const LPC_GPIO_PIN_INT = ((LPC_GPIO_PIN_INT_Type *) LPC_GPIO_PIN_INT_BASE);
711 LPC_GPIO_GROUP_INTx_Type* const LPC_GPIO_GROUP_INT0= ((LPC_GPIO_GROUP_INTx_Type*) LPC_GPIO_GROUP_INT0_BASE);
712 LPC_GPIO_GROUP_INTx_Type* const LPC_GPIO_GROUP_INT1= ((LPC_GPIO_GROUP_INTx_Type*) LPC_GPIO_GROUP_INT1_BASE);
713 LPC_USB_Type * const LPC_USB = ((LPC_USB_Type *) LPC_USB_BASE);
714 LPC_GPIO_Type * const LPC_GPIO = ((LPC_GPIO_Type *) LPC_GPIO_BASE);
715 */
716 
717 // Změněno z define na const (možná delší kód, ale čitší např. pro IDE)
718 
719 extern LPC_I2C_Type * const LPC_I2C;
720 extern LPC_WWDT_Type * const LPC_WWDT;
721 extern LPC_USART_Type * const LPC_USART;
722 extern LPC_CTxxB0_Type * const LPC_CT16B0;
723 extern LPC_CTxxB1_Type * const LPC_CT16B1;
724 extern LPC_CTxxB0_Type * const LPC_CT32B0;
725 extern LPC_CTxxB1_Type * const LPC_CT32B1;
726 extern LPC_ADC_Type * const LPC_ADC;
727 extern LPC_PMU_Type * const LPC_PMU;
728 extern LPC_FLASHCTRL_Type * const LPC_FLASHCTRL;
729 extern LPC_SSPx_Type * const LPC_SSP0;
730 extern LPC_SSPx_Type * const LPC_SSP1;
731 extern LPC_IOCON_Type * const LPC_IOCON;
732 extern LPC_SYSCON_Type * const LPC_SYSCON;
733 extern LPC_GPIO_PIN_INT_Type * const LPC_GPIO_PIN_INT;
734 extern LPC_GPIO_GROUP_INTx_Type* const LPC_GPIO_GROUP_INT0;
735 extern LPC_GPIO_GROUP_INTx_Type* const LPC_GPIO_GROUP_INT1;
736 extern LPC_USB_Type * const LPC_USB;
737 extern LPC_GPIO_Type * const LPC_GPIO;
738 
739  /* End of group Device_Peripheral_Registers */ /* End of group (null) */ /* End of group LPC11Uxx */
743 
744 #ifdef __cplusplus
745 }
746 #endif
747 
748 
749 #endif // __LPC11UXX_H__
Definition: LPC11Uxx.h:79
__IO uint32_t PWMC
Definition: LPC11Uxx.h:248
__I uint32_t USBCLKST
Definition: LPC11Uxx.h:514
__IO uint32_t MR1
Definition: LPC11Uxx.h:230
__IO uint32_t IR
Definition: LPC11Uxx.h:254
__IO uint32_t PIO0_8
Definition: LPC11Uxx.h:408
__IO uint32_t MAINCLKSEL
Definition: LPC11Uxx.h:486
__IO uint32_t TRST_PIO0_14
Definition: LPC11Uxx.h:414
__IO uint32_t RS485CTRL
Definition: LPC11Uxx.h:202
__I uint32_t STAT
Definition: LPC11Uxx.h:119
__IO uint32_t PIO0_9
Definition: LPC11Uxx.h:409
__IO uint32_t DLL
Definition: LPC11Uxx.h:174
Definition: LPC11Uxx.h:54
__I uint32_t MIS
Definition: LPC11Uxx.h:384
__IO uint32_t SWDIO_PIO0_15
Definition: LPC11Uxx.h:415
__I uint32_t RESERVED2
Definition: LPC11Uxx.h:276
__IO uint32_t SYSPLLCLKSEL
Definition: LPC11Uxx.h:481
Definition: LPC11Uxx.h:68
__IO uint32_t MR0
Definition: LPC11Uxx.h:263
__IO uint32_t MCR
Definition: LPC11Uxx.h:259
__IO uint32_t CR
Definition: LPC11Uxx.h:296
__IO uint32_t CPSR
Definition: LPC11Uxx.h:381
__IO uint32_t SYSAHBCLKDIV
Definition: LPC11Uxx.h:488
__IO uint32_t INTROUTING
Definition: LPC11Uxx.h:591
__IO uint32_t WDTOSCCTRL
Definition: LPC11Uxx.h:477
__IO uint32_t PIO0_17
Definition: LPC11Uxx.h:417
__IO uint32_t PIO0_21
Definition: LPC11Uxx.h:421
__IO uint32_t EPINUSE
Definition: LPC11Uxx.h:586
__IO uint32_t PIO0_6
Definition: LPC11Uxx.h:406
__I uint32_t FMSW0
Definition: LPC11Uxx.h:356
__IO uint32_t DR6
Definition: LPC11Uxx.h:309
__IO uint32_t PIO0_23
Definition: LPC11Uxx.h:423
__IO uint32_t IMSC
Definition: LPC11Uxx.h:382
__IO uint32_t FALL
Definition: LPC11Uxx.h:546
__IO uint32_t LPM
Definition: LPC11Uxx.h:584
__I uint32_t RESERVED1
Definition: LPC11Uxx.h:275
__IO uint32_t SYSAHBCLKCTRL
Definition: LPC11Uxx.h:490
Product name title=UM10462 Chapter title=LPC11U1x ADC Modification date=3/16/2011 Major revision=0 Mi...
Definition: LPC11Uxx.h:295
__IO uint32_t GPREG0
Definition: LPC11Uxx.h:331
__IO uint32_t CLKOUTUEN
Definition: LPC11Uxx.h:501
__IO uint32_t PIO0_16
Definition: LPC11Uxx.h:416
__IO uint32_t CTRL
Definition: LPC11Uxx.h:561
Definition: LPC11Uxx.h:72
__I uint32_t IIR
Definition: LPC11Uxx.h:186
__IO uint32_t SCLL
Definition: LPC11Uxx.h:123
__IO uint32_t CIENF
Definition: LPC11Uxx.h:544
__IO uint32_t PIO1_20
Definition: LPC11Uxx.h:444
__IO uint32_t CLKOUTSEL
Definition: LPC11Uxx.h:500
__IO uint32_t PIO1_12
Definition: LPC11Uxx.h:436
__IO uint32_t SSP1CLKDIV
Definition: LPC11Uxx.h:494
Definition: LPC11Uxx.h:75
__IO uint32_t RISE
Definition: LPC11Uxx.h:545
__IO uint32_t PIO0_19
Definition: LPC11Uxx.h:419
__I uint32_t LSR
Definition: LPC11Uxx.h:190
__IO uint32_t ADR2
Definition: LPC11Uxx.h:127
Definition: LPC11Uxx.h:52
__I uint32_t RESERVED2
Definition: LPC11Uxx.h:242
__IO uint32_t INTSTAT
Definition: LPC11Uxx.h:588
Definition: LPC11Uxx.h:74
__IO uint32_t USBCLKUEN
Definition: LPC11Uxx.h:497
__IO uint32_t PIO0_5
Definition: LPC11Uxx.h:405
__IO uint32_t FMSSTOP
Definition: LPC11Uxx.h:354
__IO uint32_t EPSKIP
Definition: LPC11Uxx.h:585
__IO uint32_t PC
Definition: LPC11Uxx.h:224
__IO uint32_t SCLH
Definition: LPC11Uxx.h:122
__I uint32_t RBR
Definition: LPC11Uxx.h:176
__I uint32_t EPTOGGLE
Definition: LPC11Uxx.h:593
__I uint32_t CR1
Definition: LPC11Uxx.h:241
__IO uint32_t PR
Definition: LPC11Uxx.h:223
__IO uint32_t ICR
Definition: LPC11Uxx.h:194
__IO uint32_t ADR3
Definition: LPC11Uxx.h:128
Product name title=UM10462 Chapter title=LPC11U1x Windowed Watchdog Timer (WWDT) Modification date=3/...
Definition: LPC11Uxx.h:151
__IO uint32_t GPREG3
Definition: LPC11Uxx.h:334
__IO uint32_t PIO1_22
Definition: LPC11Uxx.h:446
__IO uint32_t PIO0_22
Definition: LPC11Uxx.h:422
__IO uint32_t PIO0_4
Definition: LPC11Uxx.h:404
__IO uint32_t PIO1_5
Definition: LPC11Uxx.h:429
__IO uint32_t INTSETSTAT
Definition: LPC11Uxx.h:590
Definition: LPC11Uxx.h:78
Definition: LPC11Uxx.h:73
__I uint32_t PIOPORCAP0
Definition: LPC11Uxx.h:504
Product name title=UM10462 Chapter title=LPC11U1x USART Modification date=3/16/2011 Major revision=0 ...
Definition: LPC11Uxx.h:171
__IO uint32_t MR3
Definition: LPC11Uxx.h:266
__IO uint32_t PIO0_2
Definition: LPC11Uxx.h:402
__IO uint32_t EMR
Definition: LPC11Uxx.h:279
__IO uint32_t CTCR
Definition: LPC11Uxx.h:247
__IO uint32_t TCR
Definition: LPC11Uxx.h:221
__IO uint32_t DR5
Definition: LPC11Uxx.h:308
__I uint32_t STAT
Definition: LPC11Uxx.h:313
__IO uint32_t SYSPLLCLKUEN
Definition: LPC11Uxx.h:482
__IO uint32_t MAINCLKUEN
Definition: LPC11Uxx.h:487
__IO uint32_t CLKOUTDIV
Definition: LPC11Uxx.h:502
__IO uint32_t CIENR
Definition: LPC11Uxx.h:541
__IO uint32_t IER
Definition: LPC11Uxx.h:180
__IO uint32_t BODCTRL
Definition: LPC11Uxx.h:507
__IO uint32_t DR1
Definition: LPC11Uxx.h:304
Definition: LPC11Uxx.h:84
__IO uint32_t ISEL
Definition: LPC11Uxx.h:538
__IO uint32_t EPLISTSTART
Definition: LPC11Uxx.h:582
Definition: LPC11Uxx.h:48
__IO uint32_t TC
Definition: LPC11Uxx.h:222
__I uint32_t FMSTAT
Definition: LPC11Uxx.h:361
Product name title=UM10462 Chapter title=LPC11U1x SSP/SPI Modification date=3/16/2011 Major revision=...
Definition: LPC11Uxx.h:376
Definition: LPC11Uxx.h:71
__IO uint32_t USBPLLCLKUEN
Definition: LPC11Uxx.h:484
__IO uint32_t CONCLR
Definition: LPC11Uxx.h:124
Product name title=UM10462 Chapter title=LPC11U1x GPIO Modification date=3/17/2011 Major revision=0 M...
Definition: LPC11Uxx.h:606
__I uint32_t FMSW2
Definition: LPC11Uxx.h:358
__IO uint32_t STARTERP1
Definition: LPC11Uxx.h:518
__IO uint32_t SWCLK_PIO0_10
Definition: LPC11Uxx.h:410
Product name title=UM10462 Chapter title=LPC11U1x I2C-bus controller Modification date=3/16/2011 Majo...
Definition: LPC11Uxx.h:117
Product name title=UM10462 Chapter title=LPC11U1x I/O configuration Modification date=3/16/2011 Major...
Definition: LPC11Uxx.h:399
__IO uint32_t PIO1_23
Definition: LPC11Uxx.h:447
Definition: LPC11Uxx.h:253
__IO uint32_t INTEN
Definition: LPC11Uxx.h:299
__IO uint32_t MMCTRL
Definition: LPC11Uxx.h:125
__IO uint32_t PWMC
Definition: LPC11Uxx.h:282
__IO uint32_t PIO0_3
Definition: LPC11Uxx.h:403
__IO uint32_t FLASHCFG
Definition: LPC11Uxx.h:351
__IO uint32_t SIENR
Definition: LPC11Uxx.h:540
__IO uint32_t PIO1_28
Definition: LPC11Uxx.h:452
__IO uint32_t INFO
Definition: LPC11Uxx.h:581
__IO uint32_t PCON
Definition: LPC11Uxx.h:327
__IO uint32_t FEED
Definition: LPC11Uxx.h:154
__I uint32_t CR1
Definition: LPC11Uxx.h:274
Product name title=UM10462 Chapter title=LPC11U1x Power Management Unit (PMU) Modification date=3/16/...
Definition: LPC11Uxx.h:326
__IO uint32_t PR
Definition: LPC11Uxx.h:257
__IO uint32_t PIO1_29
Definition: LPC11Uxx.h:453
__IO uint32_t IRQLATENCY
Definition: LPC11Uxx.h:510
Definition: LPC11Uxx.h:76
__IO uint32_t PDAWAKECFG
Definition: LPC11Uxx.h:521
__IO uint32_t CTCR
Definition: LPC11Uxx.h:281
__IO uint32_t EPBUFCFG
Definition: LPC11Uxx.h:587
__IO uint32_t PIO1_27
Definition: LPC11Uxx.h:451
__IO uint32_t FDR
Definition: LPC11Uxx.h:195
__IO uint32_t PIO1_0
Definition: LPC11Uxx.h:424
__IO uint32_t TER
Definition: LPC11Uxx.h:197
__I uint32_t TV
Definition: LPC11Uxx.h:155
__IO uint32_t UARTCLKDIV
Definition: LPC11Uxx.h:493
__IO uint32_t PIO1_19
Definition: LPC11Uxx.h:443
__IO uint32_t NMISRC
Definition: LPC11Uxx.h:511
__I uint32_t FMSW3
Definition: LPC11Uxx.h:359
Definition: LPC11Uxx.h:51
__IO uint32_t TCR
Definition: LPC11Uxx.h:255
__IO uint32_t TC
Definition: LPC11Uxx.h:256
__IO uint32_t STARTERP0
Definition: LPC11Uxx.h:516
Definition: LPC11Uxx.h:64
Definition: LPC11Uxx.h:80
CMSIS Cortex-M0 Device Peripheral Access Layer Header File for the NXP LPC11Uxx Device Series...
__IO uint32_t IENR
Definition: LPC11Uxx.h:539
__IO uint32_t WARNINT
Definition: LPC11Uxx.h:157
__IO uint32_t PIO1_24
Definition: LPC11Uxx.h:448
__IO uint32_t PIO1_4
Definition: LPC11Uxx.h:428
__IO uint32_t DATABUFSTART
Definition: LPC11Uxx.h:583
__I uint32_t DATA_BUFFER
Definition: LPC11Uxx.h:129
__IO uint32_t MCR
Definition: LPC11Uxx.h:189
__IO uint32_t SCR
Definition: LPC11Uxx.h:192
__IO uint32_t ACR
Definition: LPC11Uxx.h:193
Definition: LPC11Uxx.h:69
Definition: LPC11Uxx.h:50
__IO uint32_t TDI_PIO0_11
Definition: LPC11Uxx.h:411
__IO uint32_t TDO_PIO0_13
Definition: LPC11Uxx.h:413
__IO uint32_t PIO0_20
Definition: LPC11Uxx.h:420
__IO uint32_t TC
Definition: LPC11Uxx.h:153
Product name title=UM10462 Chapter title=LPC11U1x 32-bitcounter/timers CT32B0/1 Modification date=3/1...
Definition: LPC11Uxx.h:219
__IO uint32_t PIO0_1
Definition: LPC11Uxx.h:401
Definition: LPC11Uxx.h:77
__IO uint32_t PIO1_25
Definition: LPC11Uxx.h:449
Product name title=UM10462 Chapter title=LPC11U1x USB2.0device controller Modification date=3/16/2011...
Definition: LPC11Uxx.h:579
__IO uint32_t DR4
Definition: LPC11Uxx.h:307
__IO uint32_t IENF
Definition: LPC11Uxx.h:542
__IO uint32_t DR0
Definition: LPC11Uxx.h:303
__IO uint32_t PIO0_18
Definition: LPC11Uxx.h:418
__IO uint32_t ADR0
Definition: LPC11Uxx.h:121
__IO uint32_t SYSOSCCTRL
Definition: LPC11Uxx.h:476
__IO uint32_t CONSET
Definition: LPC11Uxx.h:118
__IO uint32_t EMR
Definition: LPC11Uxx.h:245
__IO uint32_t USBCLKCTRL
Definition: LPC11Uxx.h:513
__IO uint32_t USBPLLCTRL
Definition: LPC11Uxx.h:473
__IO uint32_t PDRUNCFG
Definition: LPC11Uxx.h:522
__IO uint32_t CLKSEL
Definition: LPC11Uxx.h:156
__IO uint32_t RESET_PIO0_0
Definition: LPC11Uxx.h:400
__IO uint32_t SYSPLLCTRL
Definition: LPC11Uxx.h:471
Definition: LPC11Uxx.h:81
__I uint32_t SR
Definition: LPC11Uxx.h:380
Definition: LPC11Uxx.h:83
__IO uint32_t PIO1_16
Definition: LPC11Uxx.h:440
__IO uint32_t MR0
Definition: LPC11Uxx.h:229
__I uint32_t RESERVED1
Definition: LPC11Uxx.h:240
__IO uint32_t MCR
Definition: LPC11Uxx.h:225
Definition: LPC11Uxx.h:46
__IO uint32_t PIO0_7
Definition: LPC11Uxx.h:407
__IO uint32_t CCR
Definition: LPC11Uxx.h:269
__I uint32_t USBPLLSTAT
Definition: LPC11Uxx.h:474
Product name title=UM10462 Chapter title=LPC11U1x Flash programming firmware Modification date=3/17/2...
Definition: LPC11Uxx.h:349
__IO uint32_t DAT
Definition: LPC11Uxx.h:120
Definition: LPC11Uxx.h:62
__IO uint32_t SYSRSTSTAT
Definition: LPC11Uxx.h:479
__IO uint32_t HDEN
Definition: LPC11Uxx.h:199
__IO uint32_t SYSTCKCAL
Definition: LPC11Uxx.h:508
__I uint32_t CR0
Definition: LPC11Uxx.h:239
__I uint32_t SYSPLLSTAT
Definition: LPC11Uxx.h:472
__IO uint32_t PIO1_8
Definition: LPC11Uxx.h:432
__IO uint32_t MR3
Definition: LPC11Uxx.h:232
__IO uint32_t DLM
Definition: LPC11Uxx.h:181
__IO uint32_t PIO1_21
Definition: LPC11Uxx.h:445
Definition: LPC11Uxx.h:47
__IO uint32_t DEVCMDSTAT
Definition: LPC11Uxx.h:580
__IO uint32_t WINDOW
Definition: LPC11Uxx.h:158
__IO uint32_t RS485DLY
Definition: LPC11Uxx.h:204
__IO uint32_t PRESETCTRL
Definition: LPC11Uxx.h:470
Definition: LPC11Uxx.h:85
Definition: LPC11Uxx.h:63
__IO uint32_t USBCLKDIV
Definition: LPC11Uxx.h:498
__IO uint32_t CR1
Definition: LPC11Uxx.h:378
__IO uint32_t ADR1
Definition: LPC11Uxx.h:126
__I uint32_t FMSW1
Definition: LPC11Uxx.h:357
__IO uint32_t PIO1_31
Definition: LPC11Uxx.h:455
__IO uint32_t SSP0CLKDIV
Definition: LPC11Uxx.h:492
__IO uint32_t IST
Definition: LPC11Uxx.h:547
__IO uint32_t INTEN
Definition: LPC11Uxx.h:589
__IO uint32_t MR2
Definition: LPC11Uxx.h:231
__IO uint32_t FMSTATCLR
Definition: LPC11Uxx.h:363
__IO uint32_t MR1
Definition: LPC11Uxx.h:264
__IO uint32_t GPREG1
Definition: LPC11Uxx.h:332
__IO uint32_t PDSLEEPCFG
Definition: LPC11Uxx.h:520
__IO uint32_t USBCLKSEL
Definition: LPC11Uxx.h:496
__IO uint32_t FMSSTART
Definition: LPC11Uxx.h:353
Product name title=UM10462 Chapter title=LPC11U1x GPIO Modification date=3/17/2011 Major revision=0 M...
Definition: LPC11Uxx.h:560
__IO uint32_t SCICTRL
Definition: LPC11Uxx.h:201
__IO uint32_t DR
Definition: LPC11Uxx.h:379
__IO uint32_t PIO1_26
Definition: LPC11Uxx.h:450
__IO uint32_t PIO1_13
Definition: LPC11Uxx.h:437
Product name title=UM10462 Chapter title=LPC11U1x System control block Modification date=3/16/2011 Ma...
Definition: LPC11Uxx.h:468
__IO uint32_t PIO1_14
Definition: LPC11Uxx.h:438
__IO uint32_t MR2
Definition: LPC11Uxx.h:265
__IO uint32_t PIO1_15
Definition: LPC11Uxx.h:439
__O uint32_t THR
Definition: LPC11Uxx.h:175
__I uint32_t CR0
Definition: LPC11Uxx.h:273
IRQn_Type
Definition: LPC11Uxx.h:44
__IO uint32_t OSR
Definition: LPC11Uxx.h:196
__IO uint32_t DR2
Definition: LPC11Uxx.h:305
__IO uint32_t DR7
Definition: LPC11Uxx.h:310
Product name title=UM10462 Chapter title=LPC11U1x GPIO Modification date=3/17/2011 Major revision=0 M...
Definition: LPC11Uxx.h:537
__IO uint32_t MOD
Definition: LPC11Uxx.h:152
__I uint32_t PIOPORCAP1
Definition: LPC11Uxx.h:505
Definition: LPC11Uxx.h:49
__IO uint32_t CCR
Definition: LPC11Uxx.h:235
__IO uint32_t RS485ADRMATCH
Definition: LPC11Uxx.h:203
__IO uint32_t TMS_PIO0_12
Definition: LPC11Uxx.h:412
__IO uint32_t SYSMEMREMAP
Definition: LPC11Uxx.h:469
__IO uint32_t USBPLLCLKSEL
Definition: LPC11Uxx.h:483
__I uint32_t DEVICE_ID
Definition: LPC11Uxx.h:524
__O uint32_t FCR
Definition: LPC11Uxx.h:185
__IO uint32_t GPREG2
Definition: LPC11Uxx.h:333
__IO uint32_t LCR
Definition: LPC11Uxx.h:188
__IO uint32_t ICR
Definition: LPC11Uxx.h:385
__IO uint32_t CR0
Definition: LPC11Uxx.h:377
__IO uint32_t PC
Definition: LPC11Uxx.h:258
Definition: LPC11Uxx.h:82
__I uint32_t MSR
Definition: LPC11Uxx.h:191
__IO uint32_t IR
Definition: LPC11Uxx.h:220
__IO uint32_t SIENF
Definition: LPC11Uxx.h:543
__IO uint32_t GDR
Definition: LPC11Uxx.h:297
__I uint32_t RIS
Definition: LPC11Uxx.h:383
__IO uint32_t DR3
Definition: LPC11Uxx.h:306
Definition: LPC11Uxx.h:70