Product name title=UM10462 Chapter title=LPC11U1x ADC Modification date=3/16/2011 Major revision=0 Minor revision=3 (ADC)
#include <LPC11Uxx.h>
Veřejné atributy | |
__IO uint32_t | CR |
__IO uint32_t | GDR |
__I uint32_t | RESERVED0 [1] |
__IO uint32_t | INTEN |
union { | |
__I uint32_t DR [8] | |
struct { | |
__IO uint32_t DR0 | |
__IO uint32_t DR1 | |
__IO uint32_t DR2 | |
__IO uint32_t DR3 | |
__IO uint32_t DR4 | |
__IO uint32_t DR5 | |
__IO uint32_t DR6 | |
__IO uint32_t DR7 | |
} | |
}; | |
__I uint32_t | STAT |
__IO uint32_t LPC_ADC_Type::CR |
< (@ 0x4001C000) ADC Structure (@ 0x4001C000) A/D Control Register
__I uint32_t LPC_ADC_Type::DR[8] |
(@ 0x4001C010) A/D Channel Data Register
__IO uint32_t LPC_ADC_Type::DR0 |
(@ 0x40020010) A/D Channel Data Register 0
__IO uint32_t LPC_ADC_Type::DR1 |
(@ 0x40020014) A/D Channel Data Register 1
__IO uint32_t LPC_ADC_Type::DR2 |
(@ 0x40020018) A/D Channel Data Register 2
__IO uint32_t LPC_ADC_Type::DR3 |
(@ 0x4002001C) A/D Channel Data Register 3
__IO uint32_t LPC_ADC_Type::DR4 |
(@ 0x40020020) A/D Channel Data Register 4
__IO uint32_t LPC_ADC_Type::DR5 |
(@ 0x40020024) A/D Channel Data Register 5
__IO uint32_t LPC_ADC_Type::DR6 |
(@ 0x40020028) A/D Channel Data Register 6
__IO uint32_t LPC_ADC_Type::DR7 |
(@ 0x4002002C) A/D Channel Data Register 7
__IO uint32_t LPC_ADC_Type::GDR |
(@ 0x4001C004) A/D Global Data Register
__IO uint32_t LPC_ADC_Type::INTEN |
(@ 0x4001C00C) A/D Interrupt Enable Register
__I uint32_t LPC_ADC_Type::STAT |
(@ 0x4001C030) A/D Status Register.