|
| __IO uint32_t | IR |
| |
| __IO uint32_t | TCR |
| |
| __IO uint32_t | TC |
| |
| __IO uint32_t | PR |
| |
| __IO uint32_t | PC |
| |
| __IO uint32_t | MCR |
| |
|
union { |
| __IO uint32_t MR [4] |
| |
|
struct { |
| __IO uint32_t MR0 |
| |
| __IO uint32_t MR1 |
| |
| __IO uint32_t MR2 |
| |
| __IO uint32_t MR3 |
| |
| } | |
| |
| }; | |
| |
| __IO uint32_t | CCR |
| |
|
union { |
| __I uint32_t CR [4] |
| |
|
struct { |
| __I uint32_t CR0 |
| |
| __I uint32_t CR1 |
| |
| __I uint32_t RESERVED1 |
| |
| __I uint32_t RESERVED2 |
| |
| } | |
| |
| }; | |
| |
| __IO uint32_t | EMR |
| |
|
__I uint32_t | RESERVED0 [12] |
| |
| __IO uint32_t | CTCR |
| |
| __IO uint32_t | PWMC |
| |
| __IO uint32_t LPC_CTxxB1_Type::CCR |
(@ 0x40010028) Capture Control Register
| __I uint32_t LPC_CTxxB1_Type::CR[4] |
(@ 0x4001002C) Capture Register
| __I uint32_t LPC_CTxxB1_Type::CR0 |
(@ 0x4001002C) Capture Register. CR 0
| __I uint32_t LPC_CTxxB1_Type::CR1 |
(@ 0x40010030) Capture Register. CR 1
| __IO uint32_t LPC_CTxxB1_Type::CTCR |
(@ 0x40010070) Count Control Register
| __IO uint32_t LPC_CTxxB1_Type::EMR |
(@ 0x4001003C) External Match Register
| __IO uint32_t LPC_CTxxB1_Type::IR |
< (@ 0x40010000) CT16B1 Structure (@ 0x40010000) Interrupt Register
| __IO uint32_t LPC_CTxxB1_Type::MCR |
(@ 0x40010014) Match Control Register
| __IO uint32_t LPC_CTxxB1_Type::MR[4] |
(@ 0x40010018) Match Register
| __IO uint32_t LPC_CTxxB1_Type::MR0 |
(@ 0x40010018) Match Register. MR0
| __IO uint32_t LPC_CTxxB1_Type::MR1 |
(@ 0x4001001C) Match Register. MR1
| __IO uint32_t LPC_CTxxB1_Type::MR2 |
(@ 0x40010020) Match Register. MR2
| __IO uint32_t LPC_CTxxB1_Type::MR3 |
(@ 0x40010024) Match Register. MR3
| __IO uint32_t LPC_CTxxB1_Type::PC |
(@ 0x40010010) Prescale Counter
| __IO uint32_t LPC_CTxxB1_Type::PR |
(@ 0x4001000C) Prescale Register
| __IO uint32_t LPC_CTxxB1_Type::PWMC |
(@ 0x40010074) PWM Control Register
| __I uint32_t LPC_CTxxB1_Type::RESERVED1 |
(@ 0x40010034) Capture Register. CR 2
| __I uint32_t LPC_CTxxB1_Type::RESERVED2 |
(@ 0x40010038) Capture Register. CR 3
| __IO uint32_t LPC_CTxxB1_Type::TC |
(@ 0x40010008) Timer Counter
| __IO uint32_t LPC_CTxxB1_Type::TCR |
(@ 0x40010004) Timer Control Register
Dokumentace pro tuto strukturu (struct) byla generována z následujícího souboru: