|
KizarmProbe.
|
|
KizarmProbe.
|
Product name title=UM10462 Chapter title=LPC11U1x System control block Modification date=3/16/2011 Major revision=0 Minor revision=3 (SYSCON)
#include <LPC11Uxx.h>
Veřejné atributy | |
| __IO uint32_t | SYSMEMREMAP |
| __IO uint32_t | PRESETCTRL |
| __IO uint32_t | SYSPLLCTRL |
| __I uint32_t | SYSPLLSTAT |
| __IO uint32_t | USBPLLCTRL |
| __I uint32_t | USBPLLSTAT |
| __I uint32_t | RESERVED0 [2] |
| __IO uint32_t | SYSOSCCTRL |
| __IO uint32_t | WDTOSCCTRL |
| __I uint32_t | RESERVED1 [2] |
| __IO uint32_t | SYSRSTSTAT |
| __I uint32_t | RESERVED2 [3] |
| __IO uint32_t | SYSPLLCLKSEL |
| __IO uint32_t | SYSPLLCLKUEN |
| __IO uint32_t | USBPLLCLKSEL |
| __IO uint32_t | USBPLLCLKUEN |
| __I uint32_t | RESERVED3 [8] |
| __IO uint32_t | MAINCLKSEL |
| __IO uint32_t | MAINCLKUEN |
| __IO uint32_t | SYSAHBCLKDIV |
| __I uint32_t | RESERVED4 [1] |
| __IO uint32_t | SYSAHBCLKCTRL |
| __I uint32_t | RESERVED5 [4] |
| __IO uint32_t | SSP0CLKDIV |
| __IO uint32_t | UARTCLKDIV |
| __IO uint32_t | SSP1CLKDIV |
| __I uint32_t | RESERVED6 [8] |
| __IO uint32_t | USBCLKSEL |
| __IO uint32_t | USBCLKUEN |
| __IO uint32_t | USBCLKDIV |
| __I uint32_t | RESERVED7 [5] |
| __IO uint32_t | CLKOUTSEL |
| __IO uint32_t | CLKOUTUEN |
| __IO uint32_t | CLKOUTDIV |
| __I uint32_t | RESERVED8 [5] |
| __I uint32_t | PIOPORCAP0 |
| __I uint32_t | PIOPORCAP1 |
| __I uint32_t | RESERVED9 [18] |
| __IO uint32_t | BODCTRL |
| __IO uint32_t | SYSTCKCAL |
| __I uint32_t | RESERVED10 [6] |
| __IO uint32_t | IRQLATENCY |
| __IO uint32_t | NMISRC |
| __IO uint32_t | PINTSEL [8] |
| __IO uint32_t | USBCLKCTRL |
| __I uint32_t | USBCLKST |
| __I uint32_t | RESERVED11 [25] |
| __IO uint32_t | STARTERP0 |
| __I uint32_t | RESERVED12 [3] |
| __IO uint32_t | STARTERP1 |
| __I uint32_t | RESERVED13 [6] |
| __IO uint32_t | PDSLEEPCFG |
| __IO uint32_t | PDAWAKECFG |
| __IO uint32_t | PDRUNCFG |
| __I uint32_t | RESERVED14 [110] |
| __I uint32_t | DEVICE_ID |
| __IO uint32_t LPC_SYSCON_Type::BODCTRL |
(@ 0x40048150) Brown-Out Detect
| __IO uint32_t LPC_SYSCON_Type::CLKOUTDIV |
(@ 0x400480E8) CLKOUT clock divider
| __IO uint32_t LPC_SYSCON_Type::CLKOUTSEL |
(@ 0x400480E0) CLKOUT clock source select
| __IO uint32_t LPC_SYSCON_Type::CLKOUTUEN |
(@ 0x400480E4) CLKOUT clock source update enable
| __I uint32_t LPC_SYSCON_Type::DEVICE_ID |
(@ 0x400483F4) Device ID
| __IO uint32_t LPC_SYSCON_Type::IRQLATENCY |
(@ 0x40048170) IQR delay
| __IO uint32_t LPC_SYSCON_Type::MAINCLKSEL |
(@ 0x40048070) Main clock source select
| __IO uint32_t LPC_SYSCON_Type::MAINCLKUEN |
(@ 0x40048074) Main clock source update enable
| __IO uint32_t LPC_SYSCON_Type::NMISRC |
(@ 0x40048174) NMI Source Control
| __IO uint32_t LPC_SYSCON_Type::PDAWAKECFG |
(@ 0x40048234) Power-down states for wake-up from deep-sleep
| __IO uint32_t LPC_SYSCON_Type::PDRUNCFG |
(@ 0x40048238) Power configuration register
| __IO uint32_t LPC_SYSCON_Type::PDSLEEPCFG |
(@ 0x40048230) Power-down states in deep-sleep mode
| __IO uint32_t LPC_SYSCON_Type::PINTSEL[8] |
(@ 0x40048178) GPIO Pin Interrupt Select register 0
| __I uint32_t LPC_SYSCON_Type::PIOPORCAP0 |
(@ 0x40048100) POR captured PIO status 0
| __I uint32_t LPC_SYSCON_Type::PIOPORCAP1 |
(@ 0x40048104) POR captured PIO status 1
| __IO uint32_t LPC_SYSCON_Type::PRESETCTRL |
(@ 0x40048004) Peripheral reset control
| __IO uint32_t LPC_SYSCON_Type::SSP0CLKDIV |
(@ 0x40048094) SSP0 clock divider
| __IO uint32_t LPC_SYSCON_Type::SSP1CLKDIV |
(@ 0x4004809C) SSP1 clock divider
| __IO uint32_t LPC_SYSCON_Type::STARTERP0 |
(@ 0x40048204) Start logic 0 interrupt wake-up enable register 0
| __IO uint32_t LPC_SYSCON_Type::STARTERP1 |
(@ 0x40048214) Start logic 1 interrupt wake-up enable register 1
| __IO uint32_t LPC_SYSCON_Type::SYSAHBCLKCTRL |
(@ 0x40048080) System clock control
| __IO uint32_t LPC_SYSCON_Type::SYSAHBCLKDIV |
(@ 0x40048078) System clock divider
| __IO uint32_t LPC_SYSCON_Type::SYSMEMREMAP |
< (@ 0x40048000) SYSCON Structure (@ 0x40048000) System memory remap
| __IO uint32_t LPC_SYSCON_Type::SYSOSCCTRL |
(@ 0x40048020) System oscillator control
| __IO uint32_t LPC_SYSCON_Type::SYSPLLCLKSEL |
(@ 0x40048040) System PLL clock source select
| __IO uint32_t LPC_SYSCON_Type::SYSPLLCLKUEN |
(@ 0x40048044) System PLL clock source update enable
| __IO uint32_t LPC_SYSCON_Type::SYSPLLCTRL |
(@ 0x40048008) System PLL control
| __I uint32_t LPC_SYSCON_Type::SYSPLLSTAT |
(@ 0x4004800C) System PLL status
| __IO uint32_t LPC_SYSCON_Type::SYSRSTSTAT |
(@ 0x40048030) System reset status register
| __IO uint32_t LPC_SYSCON_Type::SYSTCKCAL |
(@ 0x40048154) System tick counter calibration
| __IO uint32_t LPC_SYSCON_Type::UARTCLKDIV |
(@ 0x40048098) UART clock divider
| __IO uint32_t LPC_SYSCON_Type::USBCLKCTRL |
(@ 0x40048198) USB clock control
| __IO uint32_t LPC_SYSCON_Type::USBCLKDIV |
(@ 0x400480C8) USB clock source divider
| __IO uint32_t LPC_SYSCON_Type::USBCLKSEL |
(@ 0x400480C0) USB clock source select
| __I uint32_t LPC_SYSCON_Type::USBCLKST |
(@ 0x4004819C) USB clock status
| __IO uint32_t LPC_SYSCON_Type::USBCLKUEN |
(@ 0x400480C4) USB clock source update enable
| __IO uint32_t LPC_SYSCON_Type::USBPLLCLKSEL |
(@ 0x40048048) USB PLL clock source select
| __IO uint32_t LPC_SYSCON_Type::USBPLLCLKUEN |
(@ 0x4004804C) USB PLL clock source update enable
| __IO uint32_t LPC_SYSCON_Type::USBPLLCTRL |
(@ 0x40048010) USB PLL control
| __I uint32_t LPC_SYSCON_Type::USBPLLSTAT |
(@ 0x40048014) USB PLL status
| __IO uint32_t LPC_SYSCON_Type::WDTOSCCTRL |
(@ 0x40048024) Watchdog oscillator control
1.8.6
