Product name title=UM10462 Chapter title=LPC11U1x SSP/SPI Modification date=3/16/2011 Major revision=0 Minor revision=3 (SSP0)
#include <LPC11Uxx.h>
Veřejné atributy | |
__IO uint32_t | CR0 |
__IO uint32_t | CR1 |
__IO uint32_t | DR |
__I uint32_t | SR |
__IO uint32_t | CPSR |
__IO uint32_t | IMSC |
__I uint32_t | RIS |
__I uint32_t | MIS |
__IO uint32_t | ICR |
__IO uint32_t LPC_SSPx_Type::CPSR |
(@ 0x40040010) Clock Prescale Register
__IO uint32_t LPC_SSPx_Type::CR0 |
< (@ 0x40040000) SSP0 Structure (@ 0x40040000) Control Register 0. Selects the serial clock rate, bus type, and data size.
__IO uint32_t LPC_SSPx_Type::CR1 |
(@ 0x40040004) Control Register 1. Selects master/slave and other modes.
__IO uint32_t LPC_SSPx_Type::DR |
(@ 0x40040008) Data Register. Writes fill the transmit FIFO, and reads empty the receive FIFO.
__IO uint32_t LPC_SSPx_Type::ICR |
(@ 0x40040020) SSPICR Interrupt Clear Register
__IO uint32_t LPC_SSPx_Type::IMSC |
(@ 0x40040014) Interrupt Mask Set and Clear Register
__I uint32_t LPC_SSPx_Type::MIS |
(@ 0x4004001C) Masked Interrupt Status Register
__I uint32_t LPC_SSPx_Type::RIS |
(@ 0x40040018) Raw Interrupt Status Register
__I uint32_t LPC_SSPx_Type::SR |
(@ 0x4004000C) Status Register